Instruction Set Summary (Logical Operations)

11:26 AM 11 Comments




ANL (dest-byte),(src-byte)

Function: Logical-AND for byte variables

Description: ANL performs the bitwise logical-AND operation between the variables indicated and stores the results in the destination variable. No flags are affected.

The two operands allow six addressing mode combinations. When the destination is the Accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the Accumulator or immediate data.

Note: When this instruction is used to modify an output port, the value used as the original port data will be read from the output data latch, not the input pins.

Example: If the Accumulator holds 0C3H (1100001lB), and register 0 holds 55H (01010101B), then the following instruction,

ANL                             A,R0

leaves 41H (01000001B) in the Accumulator.

When the destination is a directly addressed byte, this instruction clears combinations of bits in any RAM location or hardware register. The mask byte determining the pattern of bits to be cleared would either be a constant contained in the instruction or a value computed in the Accumulator at run-time. The following instruction,

ANL                            P1,#01110011B

clears bits 7, 3, and 2 of output port 1.


ANL A,Rn
       Bytes: 1
     Cycles: 1
Operation: ANL
                (A) ← (A) ∧ (Rn)

ANL A,direct
      Bytes: 2
     Cycles: 1
Operation: ANL
                (A) ← (A) ∧ (direct)

ANL A,@Ri
      Bytes: 1
     Cycles: 1
Operation: ANL
                (A) ← (A) ∧ ((Ri))

ANL A,#data
       Bytes: 2
     Cycles: 1
Operation: ANL
                (A) ← (A) ∧ #data

ANL direct,A
       Bytes: 2
     Cycles: 1
Operation: ANL
               (direct) ← (direct) ∧ (A)

ANL direct,#data
      Bytes: 3
     Cycles: 2
Operation: ANL
                (direct) ← (direct) ∧ #data



ORL (dest-byte) (src-byte)

Function: Logical-OR for byte variables

Description: ORL performs the bitwise logical-OR operation between the indicated variables, storing the results in the destination byte. No flags are affected.

The two operands allow six addressing mode combinations. When the destination is the Accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the Accumulator or immediate data.

Note: When this instruction is used to modify an output port, the value used as the original port data is read from the output data latch, not the input pins.

Example: If the Accumulator holds 0C3H (11000011B) and R0 holds 55H (01010101B) then the following instruction,

ORL                        A,R0

leaves the Accumulator holding the value 0D7H (1101011lB).When the destination is a directly addressed byte, the instruction can set combinations of bits in any RAM location or hardware register. The pattern of bits to be set is determined by a mask byte, which may be either a constant data value in the instruction or a variable computed in the Accumulator at run-time. The instruction,

ORL                      P1,#00110010B

sets bits 5, 4, and 1 of output Port 1.

ORL A,Rn
       Bytes: 1
     Cycles: 1
Operation: ORL
                (A) ← (A) ∨ (Rn)

ORL A,direct
       Bytes: 2
      Cycles: 1
Operation: ORL
                (A) ← (A) ∨ (direct)

ORL A,@Ri
       Bytes: 1
     Cycles: 1
Operation: ORL
                (A) ← (A) ∨((Ri))

ORL A,#data
       Bytes: 2
     Cycles: 1
Operation: ORL
                (A) ← (A) ∨ #data

ORL direct,A
       Bytes: 2
     Cycles: 1
Operation: ORL
               (direct) ← (direct) ∨ (A)

ORL direct,#data
       Bytes: 3
     Cycles: 2
Operation: ORL
                (direct) ← (direct) ∨ #data


XRL (dest-byte),(src-byte)


Function: Logical Exclusive-OR for byte variables

Description: XRL performs the bitwise logical Exclusive-OR operation between the indicated variables, storing the results in the destination. No flags are affected.

The two operands allow six addressing mode combinations. When the destination is the Accumulator, the source can use register, direct, register-indirect, or immediate addressing; when the destination is a direct address, the source can be the Accumulator or immediate data.

Note: When this instruction is used to modify an output port, the value used as the original port data is read from the output data latch, not the input pins.

Example: If the Accumulator holds 0C3H (1100001lB) and register 0 holds 0AAH (10101010B) then the instruction,

XRL                     A,R0

leaves the Accumulator holding the value 69H (01101001B).

When the destination is a directly addressed byte, this instruction can complement combinations of bits in any RAM location or hardware register. The pattern of bits to be complemented is then determined by a mask byte, either a constant contained in the instruction or a variable computed in the Accumulator at run-time. The following instruction,

XRL                  P1,#00110001B

complements bits 5, 4, and 0 of output Port 1.

XRL A,Rn
       Bytes: 1
     Cycles: 1
Operation: XRL

                (A) ← (A) V (Rn)



CLR A

Function: Clear Accumulator

Description: CLR A clears the Accumulator (all bits set to 0). No flags are affected

Example: The Accumulator contains 5CH (01011100B). The following instruction,CLR Aleaves the Accumulator set to 00H (00000000B).

Bytes: 1
Cycles: 1
Operation: CLR
(A) ← 0



CPL A

Function: Complement Accumulator

Description: CPLA logically complements each bit of the Accumulator (one’s complement). Bits which previously contained a 1 are changed to a 0 and vice-versa. No flags are affected.

Example: The Accumulator contains 5CH (01011100B). The following instruction,

CPL                              A

leaves the Accumulator set to 0A3H (10100011B).

Bytes: 1
Cycles: 1


RL A

Function: Rotate Accumulator Left

Description: The eight bits in the Accumulator are rotated one bit to the left. Bit 7 is rotated into the bit 0 position. No flags are affected.

Example: The Accumulator holds the value 0C5H (11000101B). The following instruction,

RL                                A

leaves the Accumulator holding the value 8BH (10001011B) with the carry unaffected.
 
      Bytes: 1
     Cycles: 1
Operation: RL
                (An + 1) ← (An ) n = 0 - 6
                (A0 ) ← (A7 )


RLC A

Function: Rotate Accumulator Left through the Carry flag

Description: The eight bits in the Accumulator and the carry flag are together rotated one bit to the left. Bit 7 moves into the carry flag; the original state of the carry flag moves into the bit 0 position. No other flags are affected.

Example: The Accumulator holds the value 0C5H(11000101B), and the carry is zero. The following instruction,

RLC                      A

leaves the Accumulator holding the value 8BH (10001010B) with the carry set.

      Bytes: 1
     Cycles: 1
Operation: RLC
                 (An + 1) ← (An) n = 0 - 6
                 (A0 ) ← (C)
                 (C) ← (A 7)



RR A

Function: Rotate Accumulator Right

Description: The eight bits in the Accumulator are rotated one bit to the right. Bit 0 is rotated into the bit 7 position. No flags are affected.

Example: The Accumulator holds the value 0C5H (11000101B). The following instruction,

RR                        A

leaves the Accumulator holding the value 0E2H (11100010B) with the carry unaffected.

       Bytes: 1
     Cycles: 1
Operation: RR
                 (An ) ← (An + 1) n = 0 - 6
                 (A 7 ) ← (A 0 )


RRC A

Function: Rotate Accumulator Right through Carry flag

Description: The eight bits in the Accumulator and the carry flag are together rotated one bit to the right. Bit 0 moves into the carry flag; the original value of the carry flag moves into the bit 7 position. No other flags are affected.

Example: The Accumulator holds the value 0C5H (11000101B), the carry is zero. The following instruction,

RRC                        A

leaves the Accumulator holding the value 62 (01100010B) with the carry set.

       Bytes: 1
     Cycles: 1
Operation: RRC
                 (An ) ← (An + 1) n = 0 - 6
                 (A7 ) ← (C)
                 (C) ← (A0 )


11 comments:

  1. Good day Maam!
    I just wanted to ask. Why do we need to clear the combinations of bits in any hardware register ? Thank you in advance.

    ReplyDelete
    Replies
    1. Hi Darlyn! I assume what you're asking is about the uses of the CLR(clear) instruction right? We use clear for certain reasons: For example, you want to move a value to the accumulator, before you do so, you may consider clearing the accumulator first just to make sure that the accumulator is empty before you add a value to it. If your circuit uses latches for example, clear is very useful. For instance, you have two 7 segment display, and one of them has a latch. to be able to display a value to the first 7-segment while manipulating the display of the second segment (i.e countup/countdown program), you need to clear the bit connected to the latch and then set it whenever you just wanted to change it's display. but if not, you clear it, (to disable the latch).

      More about this on our next discussion :)

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    2. Thank you for the response Maam.. Appreciated much :)

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    3. Thank you for the response Maam.. Appreciated much :)

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  2. Ma'am DAA command adds 6 to the nibble if?

    ReplyDelete
    Replies
    1. Hi Kevin! DAA instruction adds 06 if Accumulator bits 3 through 0 are greater than nine (xxxx1010-xxxx1111), just to eliminate the letters (A-F) since in BCD format, it only acknowledges numbers from 0-9. If bits 4 through 7 are greater than nine, we add 60. Hope this helps!

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